? semiconductor components industries, llc, 2001 april, 2001 rev. 4 1 publication order number: mc10ep89/d mc10ep89 3.3v / 5vecl coaxial cable driver the mc10ep89 is a differential fanout gate specifically designed to drive coaxial cables. the device is especially useful in digital video broadcasting applications; for this application, since the system is polarity free, each output can be used as an independent driver. the driver produces swings 70% larger than a standard ecl output. when driving a coaxial cable, proper termination is required at both ends of the line to minimize signal loss. the 1.6 v (5 v) and 1.4 v (3.3 v) swing allow for termination at both ends of the cable, while maintaining a 800 mv (5 v) and 700 mv (3.3 v) swing at the receiving end of the cable. because of the larger output swings, the device cannot be terminated into the standard v cc 2.0 v. all of the dc parameters are tested with a 50 w to v cc 3.0 v load. the driver accepts a standard differential ecl input and can run off of the digital video broadcast standard 5.0 v supply. ? 310 ps typical propagation delay ? maximum frequency > 2 ghz typical ? 1.6 v (5 v) and 1.4 v (3.3 v) v outpp swing ? pecl mode operating range: v cc = 3.0 v to 5.5 v with v ee = 0 v ? necl mode operating range: v cc = 0 v with v ee = 3.0 v to 5.5 v ? open input default state ? safety clamp on inputs ? q output will default low with inputs open or at v ee http://onsemi.com device package shipping ordering information mc10ep89d so8 98 units/rail mc10ep89dr2 so8 2500 tape & reel a = assembly location l = wafer lot y = year w = work week *for additional information, see application note and8002/d so8 d suffix case 751 marking diagrams* tssop8 dt suffix case 948r alyw hp89 hep89 alyw mc10ep89dt tssop8 100 units/rail mc10ep89dtr2 tssop8 2500 tape & reel 1 8 1 8 1 8 1 8
mc10ep89 http://onsemi.com 2 1 2 3 45 6 7 8 d v ee v cc q0 d q1 q0 q1 pin description pin d*, d * q0, q1, q0 , q1 ecl data outputs function ecl data inputs v cc v ee negative supply positive supply figure 1. 8lead pinout (top view) and logic diagram * pins will default low when left open. attributes characteristics value internal input pulldown resistor 75 k internal input pullup resistor n/a esd protection human body model machine model charged device model > 4 kv > 200 v > 2 kv moisture sensitivity, indefinite time out of drypack (note 1.) level 1 flammability rating oxygen index ul94 code v0 a 1/8o 28 to 34 transistor count 152 devices meets or exceeds jedec spec eia/jesd78 ic latchup test 1. for additional information, see application note and8003/d. maximum ratings (note 2.) symbol parameter condition 1 condition 2 rating units v cc pecl mode power supply v ee = 0 v 6 v v ee necl mode power supply v cc = 0 v 6 v v i pecl mode input volta g e v ee = 0 v v i v cc 6 v v i pecl mode in ut voltage necl mode input voltage v ee = 0 v v cc = 0 v v i v cc v i v ee 6 6 v v i out output current continuous surge 50 100 ma ma ta operating temperature range 40 to +85 c t stg storage temperature range 65 to +150 c q ja thermal resistance (junction to ambient) 0 lfpm 500 lfpm 8 soic 8 soic 190 130 c/w c/w q jc thermal resistance (junction to case) std bd 8 soic 41 to 44 c/w q ja thermal resistance (junction to ambient) 0 lfpm 500 lfpm 8 tssop 8 tssop 185 140 c/w c/w q jc thermal resistance (junction to case) std bd 8 tssop 41 to 44 c/w t sol wave solder <2 to 3 sec @ 248 c 265 c 2. maximum ratings are those values beyond which device damage may occur.
mc10ep89 http://onsemi.com 3 dc characteristics, pecl v cc = 3.3 v, v ee = 0 v (note 3.) 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit iee power supply current 22 28 34 24 32 38 28 34 40 ma v oh output high voltage (note 4.) 2080 2180 2280 2150 2250 2350 2225 2325 2425 mv v ol output low voltage (note 4.) 620 720 820 630 730 830 670 770 870 mv v ih input high voltage (single ended) 2070 2410 2170 2490 2240 2580 mv v il input low voltage (single ended) 1350 1800 1350 1820 1350 1855 mv v ihcmr input high voltage common mode range (differential) (note 5.) 2.0 3.3 2.0 3.3 2.0 3.3 v i ih input high current 150 150 150 m a i il input low current d d 0.5 150 0.5 150 0.5 150 m a note: 10ep circuits are designed to meet the dc specifications shown in the above table after thermal equilibrium has been estab lished. the circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. 3. input and output parameters vary 1:1 with v cc . 4. all loading with 50 ohms to v cc 3.0 volts. 5. v ihcmr min varies 1:1 with v ee , max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the differential input signal. dc characteristics, pecl v cc = 5.0 v, v ee = 0 v (note 6.) 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit iee power supply current 27 34 41 30 37 44 32 39 46 ma v oh output high voltage (note 7.) 3780 3880 3980 3850 3950 4050 3925 4025 4125 mv v ol output low voltage (note 7.) 2075 2225 2375 2060 2210 2360 2090 2240 2390 mv v ih input high voltage (single ended) 3770 4110 3870 4190 3940 4280 mv v il input low voltage (single ended) 3050 3500 3050 3520 3050 3555 mv v ihcmr input high voltage common mode range (differential) (note 8.) 2.0 5.0 2.0 5.0 2.0 5.0 v i ih input high current 150 150 150 m a i il input low current d d 0.5 150 0.5 150 0.5 150 m a note: 10ep circuits are designed to meet the dc specifications shown in the above table after thermal equilibrium has been estab lished. the circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. 6. input and output parameters vary 1:1 with v cc . 7. all loading with 50 ohms to v cc 3.0 volts. 8. v ihcmr min varies 1:1 with v ee , max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the differential input signal.
mc10ep89 http://onsemi.com 4 dc characteristics, necl v cc = 0 v, v ee = 3.3 v (note 9.) 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit iee power supply current 22 28 34 24 32 38 28 34 40 ma v oh output high voltage (note 10.) 1220 1120 1020 1150 1050 950 1075 975 875 mv v ol output low voltage (note 10.) 2680 2580 2480 2670 2570 2470 2630 2530 2430 mv v ih input high voltage (single ended) 1230 890 1130 810 1060 720 mv v il input low voltage (single ended) 1950 1500 1950 1480 1950 1445 mv v ihcmr input high voltage common mode range (differential) (note 11.) 1.3 0.0 1.3 0.0 1.3 0.0 v i ih input high current 150 150 150 m a i il input low current d d 0.5 150 0.5 150 0.5 150 m a note: 10ep circuits are designed to meet the dc specifications shown in the above table after thermal equilibrium has been estab lished. the circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. 9. input and output parameters vary 1:1 with v cc . 10. all loading with 50 ohms to v cc 3.0 volts. 11. v ihcmr min varies 1:1 with v ee , max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the differential input signal. dc characteristics, necl v cc = 0v, v ee = 5.2 (note 12.) 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit iee power supply current 25 32 39 28 35 42 31 38 45 ma v oh output high voltage (note 13.) 1220 1120 1020 1150 1050 950 1075 975 875 mv v ol output low voltage (note 13.) 2950 2800 2650 2950 2850 2650 2950 2800 2650 mv v ih input high voltage (single ended) 1230 890 1130 810 1060 720 mv v il input low voltage (single ended) 1950 1500 1950 1480 1950 1445 mv v ihcmr input high voltage common mode range (differential) (note 14.) 3.2 0.0 3.2 0.0 3.2 0.0 v i ih input high current 150 150 150 m a i il input low current d d 0.5 150 0.5 150 0.5 150 m a note: 10ep circuits are designed to meet the dc specifications shown in the above table after thermal equilibrium has been estab lished. the circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. 12. input and output parameters vary 1:1 with v cc . 13. all loading with 50 ohms to v cc 3.0 volts. 14. v ihcmr min varies 1:1 with v ee , max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the differential input signal.
mc10ep89 http://onsemi.com 5 ac characteristics v cc = 0v; v ee = 3.0 v to 5.5 v or v cc = 3.0 v to 5.5 v; v ee = 0 v (note 15.) 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit f max maximum toggle (see figure 2. f max /jitter) > 2 > 2 > 2 ghz t plh , t phl propagation delay to output differential 220 280 340 250 310 370 270 330 390 ps t skew within device skew q, q device to device skew (note 16.) 5.0 20 120 5.0 20 120 5.0 20 120 ps t jitter cycletocycle jitter (see figure 2. f max /jitter) .5 < 1 .5 < 1 .5 < 1 ps v pp input voltage swing (differential) 150 800 1200 150 800 1200 150 800 1200 mv t r t f output rise/fall times q, q (20% 80%) 175 250 325 200 275 350 225 295 375 ps 15. measured using a 750 mv source, 50% duty cycle clock source. all loading with 50 ohms to v cc 3.0 v. 16. skew is measured between outputs under identical transitions. 0 200 400 600 800 1000 1200 1400 1600 1800 0 1000 2000 3000 4000 5000 1 2 3 4 5 6 7 8 9 figure 2. f max /jitter frequency (mhz) (jitter) 3.3 v 5 v v outpp (mv) jitter out ps (rms)
mc10ep89 http://onsemi.com 6 150 w 150 w v ee 0.1 m f 75 w 75 w 75 w coax 0.1 m f 75 w 75 w 75 w coax ep89 dc blocking capacitors figure 3. termination configurations v tt = v cc 3.0 v typical termination for output driver and device evaluation (see application note and8020 termination of ecl logic devices.) driver device receiver device q qb d db 50 50 v tt cable driver termination configuration resource reference of application notes an1404 eclinps circuit performance at nonstandard v ih levels an1405 ecl clock distribution techniques an1406 designing with pecl (ecl at +5.0 v) an1504 metastability and the eclinps family an1568 interfacing between lvds and ecl an1650 using wireor ties in eclinps designs an1672 the ecl translator guide and8001 odd number counters design and8002 marking and date codes and8009 eclinps plus spice i/o model kit and8020 termination of ecl logic devices for an updated list of application notes, please see our website at http://onsemi.com.
mc10ep89 http://onsemi.com 7 package dimensions so8 d suffix plastic soic package case 75107 issue w seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 x y g m y m 0.25 (0.010) z y m 0.25 (0.010) z s x s m dim min max min max inches millimeters a 2.90 3.10 0.114 0.122 b 2.90 3.10 0.114 0.122 c 0.80 1.10 0.031 0.043 d 0.05 0.15 0.002 0.006 f 0.40 0.70 0.016 0.028 g 0.65 bsc 0.026 bsc l 4.90 bsc 0.193 bsc m 0 6 0 6 seating plane pin 1 1 4 85 detail e b c d a g detail e f m l 2x l/2 u s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) t v w 0.25 (0.010) 8x ref k ident k 0.25 0.40 0.010 0.016 tssop8 dt suffix plastic tssop package case 948r02 issue a notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. terminal numbers are shown for reference only. 6. dimension a and b are to be determined at datum plane -w-.
mc10ep89 http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com tollfree from mexico: dial 018002882872 for access then dial 8662979322 asia/pacific : ldc for on semiconductor asia support phone : 3036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc10ep89/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk, ireland
|
